Atsushi Takahashi

Atsushi TAKAHASHI received his B.E., M.E., and D.E. degrees in electrical and electronic engineering from Tokyo Tech, Tokyo, Japan, in 1989, 1991, and 1996, respectively.

He had been with the Tokyo Tech as a Research Associate from 1991 to 1997, and as an Associate Professor from 1997 to 2009 and from 2012 to 2015, and as a Professor of the Science Tokyo from 2015.

He had been with the Osaka University as an Associate Professor from 2009 to 2012.

He visited University of California, Los Angeles, U.S.A., as a Visiting Scholar from 2002 to 2003.

He served as the Chair of Technical Group on VLSI Design Technologies of IEICE in 2009, the (Interim) Chair of All Japan Joint Chapter of IEEE CEDA in 2014-2016, a Board of Governors of IEEE CASS in 2015-2019, the Chair of Japan Joint Chapter of IEEE CASS in 2020-2021, the President of Engineering Sciences Society of IEICE in 2021, Editor-in-Chief of Fundamentals Review (IEICE ESS) in 2017-2018, Editor-in-Chief of Transactions on System-LSI Design Methodologies (IPSJ TSLDM) in 2019-2022, and Technical Program Chair (2018) and General Chair (2023) of Asia and South Pacific Design Automation Conference (ASP-DAC).

He is currently a Professor with Department of Information and Communications Engineering, School of Engineering, Tokyo Tech, and will be Associate Dean for General Affairs and Human Resources of School of Engineering in Tokyo Tech in 2022-2023.

His research interests are in VLSI layout design and combinational algorithms.

He received Tokyo Tech Best Engineering Teacher Award in 2019. He is a fellow of IEICE, a senior member of IEEE and IPSJ, and a member of ACM.